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  lcd module specification products name:apax t1 7a1 43.2 cm(1 7 . 0 inch) s xga(1 280 x 1024 ) 16.7m color tft lcd module 12 .0 v l preliminary specification this technical specification is tentative and it will be changed without notice. ?ia1~a?|3--?q x_?o????? 76 ?? 39 ?1 4 ? tel:02 - 87912868 fax:02 - 87912869 version. 1.0
i contents ii record of revision 1.0 handling precautions 2.0 general description 2.1 display characteristics 2.2 functional block diagram 2.3 optical characteristics 2.4 pixel format image 3.0 electrical characteristics 3.1 absolute maximum ratings 3.2 connectors 3.3 signal pin 3.4 signal description 3.5 signal electrical characteristics 3.6 interface timing 3.6.1 timing characteristics 3.6.2 timing definition 3.7 power consumption 3.8 power on/off sequence 4.0 backlight characteristics 4.1 signal for lamp connector 4.2 parameter guide line for ccfl inverter 5.0 vibration, shock and drop 5.1 vibration and shock 5.2 drop test 6.0 environment 6.1 temperature and humidity 6.1.1 operating conditions 6.1.2 shipping conditions 6.2 atmospheric pressure 6.3 thermal shock 7.0 reliability 7.1 failure criteria 7.2 failure rate 7.2.1 usage 7.2.2 components de-rating 7.3 ccfl life 7.4 on/off cycle 8.0 safety 8.1 sharp edge requirement 8.2 material 8.2.1 toxicity 8.2.2 flammability 8.3 capacitors 8.4 hazardous voltage 9.0 other requirements 9.1 smoke free design 9.2 national test lab requirement 10.0 mechanical characteristics
ii record of revision version and date page old description new description remark 0.1. 99/11/20 all first edition for customer all 0.2. 99/11/27 3 ii record of revision add 5 physical size 404(w) x 322(h) x 25(d) physical size 398.0(w) x328.5(h) x 25.0(d) spec. change 0.3 2000/2/9 4 (9) in case if a m odule ? delete 4 (10) notebook pc bezel ? lcd monitor housing ? 4 this module is designed for a display unit of personal computer. delete 4 (power consumption) 40w (power consumption) 30w 5 (line2)tft/lcd (line2)tft-lcd 5 color/ chromaticity value ?tbd? added 7 cie white value ?tbd? added 7 white luminance at ccfl 7.0ma (center point) white luminance at ccfl 6.0ma (center point) 7 luminance uniformity(note 1) new 10 (signal pin 21) rxein3+ (signal pin 21) rxein3- 18 signal for lamp connector (pin #2 lamp low voltage) signal for lamp connector (pin #2 lamp high voltage) 18 (l63) white luminance value : ? typ : tbd? (l63) white luminance value : ? typ : 235? 18 icfl(ccfl current) value : ? min : 6.5? icfl(ccfl current) value : ? min : 5.5? 18 icfl(ccfl current) value : ? typ : 7.0? icfl(ccfl current) value : ? typ : 6.0? 18 icfl(ccfl current) value : ? max: 7.5? icfl(ccfl current) value : ? max : 6.5? 18 vcfl(ccfl discharge voltage value : ? typ : 717? vcfl(ccfl discharge voltage value : ? typ : 720? 18 pcfl(ccfl power consumption) value : ? typ : 20? pcfl(ccfl power consumption) value : ? typ : 17.3? 18 pcfl(ccfl power consumption) value : ? max : 20.0? new 19 5.1 mechanical characteristics move to 10.0 mechanical characteristics 19 (line2)?m2.5 screws. delete 19 5.2 module thickness delete 19 5.3 label delete 19 5.4 vibration & shock 5.0 vibration, shock & drop 19 5.5 drop test height 75 cm 5.3 drop test height 60 cm
20 6.1.2 shipping conditions : relative humidity : 5% to 100% 6.1.2 shipping conditions : relative humidity : 8% to 95% 2 4 ~2 5 10.0 me c hani c al c ha r a c te r i s t i c s new
1.0 handling precautions 1) since front polarizer is easily damaged, pay attention not to scratch it. 2) be sure to turn off power supply when inserting or disconnecting from input connector. 3) wipe off water drop immediately. long contact with water may cause discoloration or spots. 4) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. 5) since the panel is made of glass, it may break or crack if dropped or bumped on hard surface. 6) since cmos lsi is used in this module, take care of static electricity and insure human earth when handling. 7) do not open nor modify the module assembly. 8) do not press the reflector sheet at the back of the module to any directions. 9) at the insertion or removal of the signal interface connector, be sure not to rotate nor tilt the interface connector of the tft-lcd module. 10) after installation of the tft-lcd module into an enclosure (lcd monitor housing, for example), do not twist nor bend the tft -lcd module even momentary. at designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the tft -lcd module from outside. otherwise the tft -lcd module may be damaged.
2.0 general description t his s pe c i f i c ation applies to the 17.0 in c h color t f t - lcd module . the display supports the sxga (1280(h) x 1024(v)) screen format and 16.7m colors (rgb 8-bits data). all input signals are 2 channel lvds interface compatible. this module does not contain an inverter card for backlight. 2.1 display characteristics the following items are characteristics summary on the table under 25  condition: items unit specifications screen diagonal [mm] 432(17.0") active area [mm] 337.920 (h) x 270.336(v) pixels h x v 1280(x3) x 1024 pixel pitch [mm] 0.264 (per one triad) x 0.264 pixel arrangement r.g.b. vertical stripe display mode normally white w hite lu m inan c e [ c d/ m 2 ] 2 50 ( t y p) cont r a s t ratio 4 00 : 1 ( t y p) o p t i c a l r i se t i m e / f a l l t i m e [ m s e c] 45 ( t y p ) nominal input voltage vdd [volt] +12.0 v power consumption (vdd line + ccfl line) [watt] 25 w ( ma x ) ( w /o inve r t e r , all bla c k patte r n) w eight [ g r a m s ] 2 5 00 ( t y p) physical size [mm] 398.0(w) x 328.5(h) x 25.0(d) (typ) electrical interface even/odd r/g/b data(8bits),3 sync signal, clock support color 16.7m colors ( rgb 8-bit data ) temperature range operating storage (shipping) [ o c] [ o c] 0 to +50 -20 to +60
2.2 functional block diagram the following diagram shows the functional block of the 17.0 inches color tft-lcd module: tft array/cell 8 bits data for r/g/b hsync vsync vdd lcd controller lcd drive card backlight unit 4ccfl 1280(r/g/b) x 1024 gnd dc-dc converter ref circuit y-driver x-driver dsptmg dtclk jae fi-se30p-hf or fi-s30p-hf mating type jae fi-s30s lcd drive jst bhr-04vs-1 mating type sm04(4.0)b-bhs-1-tb lamp connector
2.3 optical characteristics the optical characteristics are measured under stable conditions at 25  (room temperature): item conditions min. typ. max. viewing angle [degree] [degree] horizontal (right) cr = 10 (left) 60 60 cr: contrast ratio [degree] [degree] vertical (upper) cr = 10 (lower) 4 5 70 contrast ratio nor m al d i re c t i o n 250 400 re s pon s e t i m e [ m s e c ] rai s ing t i m e - 30 [ m s e c] f a l l i n g t i m e - 15 [ m s e c ] r a i s ing + f a lling - 45 color / chro m a ti c i ty red x 0. 60 0 .63 0. 66 coo r dinates ( c ie) r ed y 0. 30 0. 33 0.3 6 g r een x 0. 27 0.30 0. 33 g r een y 0. 57 0.60 0. 63 blue x 0. 12 0.15 0. 18 blue y 0. 07 0.10 0. 13 color coo r dinates ( c ie) w hite w hite x 0. 28 0.31 0. 3 4 w hite y 0.3 0 0.33 0. 36 lu m inan c e uni f o r m i ty ( n ote 1) [%] 80 8 5 - white luminance at ccfl 6.0ma(center point) [ c d/ m 2 ] 200 2 50 - note 1 measure points & diagram display length distance x = ?????????????? [ m m ] 4 display width distance y = ?????????????? [ m m ] 4 minimum luminance in 5 points (1-5) uniformity = ?????????????????--?? maximum luminance in 5 points (1-5)
 lcd display area = 337.9 x 270.4 mm 2.4 pixel format image following figure shows the relationship of the input signals and lcd pixel format. r g b r g b r g b r g b r g b r g b r g b r g b 0 1 1278 1279 1st line 1024th line  d-y = 67.60 mm  1    d-x =84.48 mm
3.0 electrical characteristics 3.1 absolute maximum ratings absolute maximum ratings of the module is as following: item symbol min max unit conditions logic/lcd drive voltage vin -0.3 +13.2 [volt] select lvds data order sellvds -0.3 +3.3 [volt] cc f l in r u s h c u r r ent ic f ll - 38 [ m a ] n ote 1 ccfl current icfl - 7.6 [ma] rms o pe r ating t e m pe r atu r e t o p 0 + 50 [ o c] note 2 o pe r ating hu m i dity h o p 8 95 [%rh] note 2 sto r age t e m pe r atu r e t st - 20 + 60 [ o c] note 2 sto r age hu m i dity hst 8 95 [%rh] note 2 note 1 : maximum wet-bulb should be 39    and no condensation. note 2 : duration=50 msec. 3.2 connectors physical interface is described as for the connector on module. these connectors are capable of accommodating the following signals and will be following components. connector name / designation interface connector manufacturer jae or compatible type / part number fi-se30p-hf or fi-s30p-hf mating housing/part number fi-s30s conn e c t or n a me / d es i gn a tion la m p conne c tor / b acklight lamp manufacturer jst type / part number bhr-04vs-1 mating type / part number sm04(4.0)b-bhs-1-tb
3.3 signal pin pin# signal name pin# signal name 1 vin 2 vin 3vin 4agnd 5agnd 6agnd 7 sellvds 8 reserved (no connection) 9dgnd 10rxoin3+ 11 rxoin3- 12 rxoclkin+ 13 rxoclkin- 14 rxoin2+ 15 rxoin2- 16 rxoin1+ 17 rxoin1- 18 rxoin0+ 19 rxoin0- 20 rxein3+ 21 r x ein3 - 22 r x e clkin+ 23 rxeclkin- 24 rxein2+ 25 rxein2- 26 rxein1+ 27 rxein1- 28 rxein0+ 29 rxein0- 30 dgnd
3.4 signal description the module using a pair of lvds receiver sn75lvds82(texas instruments) or compatible. lvds is a differential signal technology for lcd interface and high speed data transfer device. transmitter shall be sn75lvds83(negative edge sampling) or compatible . the first lvds port(rxexxx) transmits even pixels while the second lvds port(rxoxxx) transmits odd pixels.
     
    

   

   

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,.).-&.##&&").*'*)*."2!)3-&"*)*78"(7"(7
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4 $  
,.).-&.##&&").*'*)*."2!)3-&"*)*4 %   &0*).-&.##&&").*'*)*."2!)3-&"*)*4 +  1
,.).-&.##&&").*'*)*."2!)3-&"*)*4 /  1 &0*).-&.##&&").*'*)*."2!)3-&"*)*4 1    !"# ,.0"*'   "2!),.0"*', # *"&-&"(' (6,9*'':&)9&,*;&).;."0< lvds data name description dsp display timing :when the signal is high, the pixel data shall be valid to be displayed v-s vertical sync :both positive and negative polarity are acceptable h-s horizontal sync :both positive and negative polarity are acceptable
ti lvds x?mitter sn75lvds83 module lvds signal sellvds(interface connector pin7) signal name low(open) high d0 red0 red2 d1 red1 red3 d2 red2 red4 d3 red3 red5 d4 red4 red6 d5 red7 red1 d6 red5 red7 d7 green0 green2 d8 green1 green3 d9 green2 green4 d10 green6 green0 d11 green7 green1 d12 green3 green5 d13 green4 green6 d14 green5 green7 d15 blue0 blue2 d16 blue6 blue0 d17 blue7 blue1 d18 blue1 blue3 d19 blue2 blue4 d20 blue3 blue5 d21 blue4 blue6 d22 blue5 blue7 d23 na na d24 h sync h sync d25 v sync v sync d26 display timing display timing d27 red6 red0
note: r/g/b data 7:msb, r/g/b data 0:lsb 



                                                                                                            
 
      
 
 
  
 
 
 
   
 
                  
 
      
 
 
   
 
 
 
    
 
       
note: r/g/b data 7:msb, r/g/b data 0:lsb : the interface card has a 100-ohm resistor between positive and negative lines of each lvds signal input on the internal circuit.     



    



                



    



    



    



    



    



    



    



            
 
      
 
 
  
 
 
 
   
 
                  
 
      
 
 
   
 
 
 
    
 
       
3.5 signal electrical characteristics input signals shall be low or hi-z state when vin is off it is recommended to refer the specifications of sn75lvds82dgg(texas instruments) in detail. each signal characteristics are as follows; parameter condition min max unit vth differential input high voltage(vcm=+1.2v) 100 [mv] vtl differential input low voltage(vcm=+1.2v) -100 [mv] name description min typ max unit note sellvds high voltage 2 3 3.3 [v] low voltage -0.1 0 0.7 [v] current -1 1 [ma] thd tsu input clock input data t
3.6 interface timings basically, interface timings described here is not actual input timing of lcd module but output timing of sn75lvds82dgg (texas instruments) or equivalent. 3.6.1 timing characteristics signal item symbol min typ max unit dtclk freq. fdck 50 54 56.8 mhz dtclk cycle tck 17.6 18.5 20 ns +v-sync frame rate 1/tv 56.25 60.02 61 hz +v-sync cycle tv 16.39 16.66 17.78 ms +v-sync cycle tv 1035 1066 2047 lines +v-sync active level tva 3 3 lines +v-sync v-back porch tvb 7 38 63 lines +v-sync v-front porch tvf 1 1 lines +dsptmg v-line m - 1024 - lines +h-sync scan rate 1/th - 63.98 - khz +h-sync cycle th 844 844 1023 tck +h-sync active level tha(*1) 4 56 tck +h-sync back porch thb(*1) 4 124 tck +h-sync front porch thf 4 24 tck +dsptmg display pixels n - 640 - tck note: typical value is refer to vesa standard , (*1) tha+thb should be less than 1024 tck. 3.6.2 timing definition 1688dot 112dot 248do t 48dot 1280dot h-sync dsptmg 42h 1h 38 h 3h 1024h v-sync dsptmg note :1280x1024 at 60 hz (vesa standard), horizontal line rate :15.63us, dot clock :108.000mhz.
3.7 power consumption input power specifications are as follows; symbol parameter min typ max units condition vdd logic/lcd drive voltage 11.4 12 12.6 [volt] pdd v dd po w er 4.5 6. 0 [ w att] vin=12v ,all bla c k pattern vddrp allowable logic/lcd drive ripple voltage 100 [mv] p-p vddns allowable logic/lcd drive ripple noise 100 [mv] p-p 3.8 power on/off sequence vin power and lamp on/off sequence is as follows. interface signals are also shown in the chart. signals from any system shall be hi-z state or low level when vin is off. 10% 10% 10% 10% 10% 10% 10% 90% 90% 0 min.0 min. 0 min. 170ms min. 10ms min. 30 max, 1ms min. vin lamp on signal
4.0 backlight characteristics 4.1 signal for lamp connector pin # si g nal name 1 lam p hi g h volta g e 2 lam p hi g h volta g e 3 no connection 4 ground 4.2 parameter guide line for cfl inverter symbol parameter min typ max units condition ( l 255 ) w hite lu m inan c e 200 2 50 - [ c d/ m 2 ](ta=25 o c) icfl ccfl current 5.5 6.0 6.5 [ma] rms (ta=25 o c) icfll ccfl inru s h c u rrent - 2 6 34 [ m a ] note 1 f c f l cc f l f r equen c y 40 50 80 [kh z ] ( t a=2 5 o c) note 2 vic f l cc f l ignition voltage %11 [volt] r m s ( t a = 0 o c) note 4 vc f l cc f l di sc ha r ge voltage ( r e f e r en c e) 720 86 3 [volt] r m s (ta=25 o c) note 3 pc f l cc f l po w er c on s u m ption 17.3 1 9 .0 [ w att] ( t a=2 5 o c) note 3 note 1: duration=50 [msec] note 2: ccfl frequency should be carefully determined to avoid interference between inverter and tft lcd note 3: calculator value for reference (icflvcfl=pcfl) note 4: ccfl inverter should be able to give out a power that has a generating capacity of over 1700 voltage. lamp units need 1700 voltage minimum for ignition
5.0 vibration, shock, and drop 5.1 vibration & shock " frequency: 10 - 200hz " sweep: 30 minutes each axis (x, y, z) " acceleration: 1.5g(10~200hz p- p) " test method: acceleration (g) 1.5 frequency (hz) 10~200~10 active time(min) 30 5.2 shock test spec: acceleration (g) ?a 35 active time -b 20 wave form half-sin times 1 " direction:  x ,  y,  = 5.3 drop test package test: the drop height is 60 cm.
6.0 environment the display module will meet the provision of this specification during operating condition or after storage or shipment condition specified below. operation at 10% beyond the specified range will not cause physical damage to the unit. 6.1 temperature and humidity 6.1.1 operating conditions the display module operates error free, when operated under the following conditions; temperature 0 0 c to 50 0 c relative humidity 8% to 95% wet bulb temperature 39.0 0 c 6.1.2 shipping conditions the display module operates error free, after the following conditions; temperature -20 0 c to 60 0 c relative humidity 8% to 95% wet bulb temperature 39.0 0 c 6.2 atmospheric pressure the display assembly is capable of being operated without affecting its operations over the pressure range as following specified; pressure note maximum pressure 1040hpa 0m = sea level minimum pressure 674hpa 3048m = 10.000 feet note : non-operation attitude limit of this display module = 30,000 feet. = 9145 m. 6.3 thermal shock the display module will not sustain damage after being subjected to 100 cycles of rapid temperature change. a cycle of rapid temperature change consists of varying the temperature from -20 0 c to 60 0 c, and back again. thermal shock cycle -20 0 c for 30min 60 0 c for 30min power is not applied during the test. after temperature cycling, the unit is placed in normal room ambient for at least 4 hours before powering on.
7.0 r e lia b ility t his di s play m odule and the pa c k aging of that w ill c o m ply f ollo w i ng s t anda r d s . 7.1 failure cri t eria t he di s play a s s e m bly w ill be c on s ide r ed as f ailing unit w hen it no longer m eets any of the r equi r e m ents s t ated in this s pe c i f i c ation. o nly as f or m a x i m um w hite lu m i nan c e, f ollo w i ng c r ite r ia is appli c able. 7.2 failure r a t e the average failure rate of the display module (from first power-on cycle till 1,000 hours later) will not e x c eed 1.0 % . t he ave r age f ailu r e r ate of the di s play m odule f r om 1,000 hou r s until 1 6 ,000 hou r s w ill not e x c eed 0.70% per 1 0 00 hou r s . 7.2.1 usage the assumed usage for the above criteria is: " 220 power-on hours per month " 500 power on/off cycles per month " maximum brightness setting " operation to be within office environment (25 0 c typical) 7.2.2 component de-rating all the components used in this device will be checked the load condition to meet the failure rate criteria. 7.3 ccfl life t he a s s u m ed cc f l li f e w ill be longer than 3 0,000 hou r s un de r s ta b le co n di t io n at 25 + / _ 5 c;standard current at 6.0 + /- 0. 5 m a . 7.4 on/off cycle the display module will be capable of being operated over the following on/off cycles. o n/ o ff value c y c l e +vin and cc f l po w er 35,000 1 0 se c on d s o n / 1 0 s ec o nd s o ff
8.0 safety 8.1 sharp edge requirements there will be no sharp edges or comers on the display assembly that could cause injury. 8.2 materials 8.2.1 toxicity there will be no carcinogenic materials used anywhere in the display module. if toxic materials are used, they will be reviewed and approved by the responsible adt toxicologist. 8.2.2 flammability  
     
  





  
  
    

  

  
  the printed circuit board will be made from material rated 94-v1 or better. the actual ul flammability rating will be printed on the printed circuit board. 8.3 capacitors if any polarized capacitors are used in the display assembly, provisions will be made to keep them from being inserted backwards. 8.4 hazardous voltages any point exceeding 42.4 volts meets the requirement of the limited current circuit. the current through a 2k  resistance is less than 0.7 x f (khz) ma.
9.0 other requirements 9.1 national test lab requirement (tbd) the display module will satisfy all requirements for compliance to ul 1950, first edition u.s.a. information technology equipment csa c22.2 no.950-m89 canada, information technology equipment eec 950 international, information technology equipment en 60 950 international, information processing equipment (european norm for iec950)
(c) copyright acer display technology, inc. februar y , 2000 all r i ghts r e ser v ed. no reproduction and redistribution allowed. 10.0 mechanical characteristics
(c) copyright acer display technology, inc. februar y , 2000 all r i ghts r e ser v ed. no reproduction and redistribution allowed.


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